Solder bumping of semiconductor wafers is undergoing rapid evolution. Whereas past methods of evaporation, plating and paste screening have been the historical technologies, requirements such as alloy flexibility (especially for lead-free (Pb-free) alloys) and cost reductions are driving the industry towards two emerging new technologies. Included in these technologies are ball placement and injection molded solder, otherwise known as Controlled Collapse Chip Connection New Process (C4NP). This methodology focuses on using injection molded solder for significantly improving ball placement technology.
In the past, solder balls have typically been produced by a “ball drop” technique, wherein molten solder is used to produce balls having a wide range of sizes. After the production of these solder balls, a separation step based on ball size is undertaken. Using solder ball sieves of various opening sizes, the balls are separated into groups with tighter size ranges. These may then be used for various bumping applications, depending on sizes required. Elimination of this sieving step is highly desirable.
Moreover, even when the sieving step is used, a large size range may still be present in each sieved grouping, depending on the sieving matrix employed. This can lead to unsatisfactory results because in solder bumping applications, the smallest variations in bump sizes are preferred.
In view of these challenges, another method that has been disclosed for producing the solder balls is to deposit solder paste into cavities in a silicon mold. This paste is later reflowed to produce solder balls. However, this methodology possesses the same drawback that results from any paste application, namely voiding and volume reduction from paste to solder.
Voiding is a well known problem when solder paste is used. As the small solder particles agglomerate, trapping flux voids is a frequent effect. These voids in the solder balls can potentially weaken the mechanical strength of these solder balls in their interconnect applications.
Secondly, the volume reduction from paste to solder limits how closely certain sized cavities can be placed in an array, and this limits the upper range of solder bump sizes at a given pitch or spacing.